User Guide for PV Dynamic Model Simulation Written on PSCAD Platform

Author: National Renewable Energy Laboratory^[1]

The term generic is used to describe a model that is not specific to any manufacturer, which means that a dynamic model should be able to represent PV inverters from different manufacturers and not be specific to only one manufacturer. Different editions of PV inverters from the same manufacturer may implement similar control strategies but different ranges of settings. For example, various regional or market segments may have different grid codes, and a PV inverter may be set to accommodate local grid codes. The input parameters of the dynamic model to represent the PV plant at this location must be adapted accordingly. The dynamic model is also an open source; thus, it is easy to modify. Only the original file will be kept unchanged. The model also needs to be flexible so that changes can be made and/or added to the control block diagram to suit the specific design of a PV inverter or a specific PV plant. Also, this model is based on three phases; thus, the three phases—a, b, and c—are represented, instead of positive sequences only. This means that all the symmetrical components—positive sequence, negative sequence, and zero sequence—can be represented. This is important for a PV inverter, because many PV inverters are single phase, and many PV inverters are installed in the distribution network, which is susceptible to unbalanced conditions (from the network or voltages). The completed PV generation dynamic model developed in this subtask is built on the PSCAD platform. The PV industry lacks such a model, and this project proposed to fill that gap down to the switch details via PSCAD. PSCAD allows for the analysis of unbalanced faults, such as single-line-to-ground (SLG) or line-to-line-to-ground (LLG), a key characteristic distinguishing PSCAD models from other dynamic models that focus on positive sequence behavior (e.g., Positive Sequence Load Flow (PSLF) and Power System Simulation for Engineering (PSSE)). This program is intended as a cycle-by-cycle model of PV inverters, and it is built with detailed circuitry of the power converter (including the power semiconductor switches); thus, a detailed analysis of a PV inverter can be accomplished. For example, we can observe the dynamic of the voltage on the direct-current (DC) bus during the transmission faults, or we can observe the dynamic of the output currents and powers when one of the power semiconductor switches is damaged or misfired. The model is also intended to include the collector system of the PV plants and other plant-level controllers. The control architecture is based on the one developed by the Renewable Energy Modeling Task Force of the Western Electricity Coordinating Council (WECC). There are three major blocks: the (1) renewable energy plant controller (REPC), (2) renewable energy electrical controller (REEC), and (3) renewable energy generator controller (REGC).

The process of PV generation from the PV cell to the power converter, which includes the maximum power point tracker, is described in the PSCAD Modules Representing PV Generator article. Here, the different types of power converters, the control implementation, and the dynamic model validation is presented.

Basic Three-Phase PV Inverter

A three-phase PV inverter is usually designed for a three-phase system with a large rating (10 kW–2 MW and above). Most PV inverters are current controlled. To understand a basic PV inverter, it is important to understand the module and PV inverter hardware. In general, a PV inverter consists of a DC bus and three pairs of power semiconductors, also called power electronic switches or power switches. The most common power switches presently used are insulated-gate bipolar transistors (IGBT). An IGBT can be turned on and off very fast within microseconds (thus, the loss from power switching is low), and it has a low conduction loss.

Basic Control of Real and Reactive Power in a Two-Bus Power System

In this section, we use a two-bus system to illustrate real and reactive power for conventional generation and generation based on power converter based generation. We assume that the generator, V_pv (Bus 1), is connected to an infinite bus, V_s (Bus 2). In a conventional power plant with a synchronous generator, the following quantities are usually used to control the output of the generator:

• The voltage magnitude is used to control the reactive power (or reactive current component, I_q by controlling the excitation winding, thus increasing the voltage of V_pv.

• The mechanical power is used to control the phase angle of the output voltage of the synchronous generator. The power angle, δ, of the output voltage mostly corresponds to the real current component, I_p, of the output current, I_s, of the voltage source.

A similar method can be used for a PV inverter, except we attempt to control the current directly.

Conventional Power System

Reactive Power Control

To understand a PV inverter and to simplify the analysis, let us consider an average model. Because the relationship of the reactive power to the terminal voltage is very tight, either the reactive power control or the voltage control is generally used. The phasor diagram concept is very useful to visualize the real power, reactive power, voltage, and current. It is also timely, as the synchrophasor measurements to monitor these quantities are available and have been installed massively in the modern power system network.

To describe the relationship between the reactive power flow and the voltage level, refer to the phasor diagram on the right. It is assumed that the PV inverter (terminal voltage, V_pv) is connected to an infinite bus, V_s, through a reactance, X_s. The PV inverter (V_pv) generates an output current, I_s. The equation describing the relationship of the voltage at the two buses and the corresponding voltage drop across the reactance, X_s, can be written as follows

\(V_{pv}=V_{s}+jX_{s}I_{s}\)

The reactive power losses (I_s²X_s) in the transmission line can be supplied from Bus 1 (V_pv) or Bus 2 (V_s), or they can be shared by both sides. Parallel compensation (e.g., capacitor banks) can be implemented on both sides. Reactive compensation can be implemented by controlling the generator itself (internal control), or it can be provided externally, such as from adjustable capacitor banks, synchronous condensers, and static power compensation (a static VAR compensator, SVC; or static compensation, STATCOM).

Consider the PVP simplified equivalent circuit, in which all the reactive power spent in the reactance, X_s, is supplied by Bus 1. As shown, the voltage V_pv > V_s, to make it possible for the reactive power to flow from Bus 1 to Bus 2. Similarly, all the reactive power spent in the reactance, X_s, is supplied by Bus 2. In this case, the relationship between the two voltages is V_pv < V_s. Now consider another case, in which the voltages at Bus 1 and Bus 2 are maintained constant, and there is equal magnitude at 1.05 p.u. The reactive power is supplied equally by both Bus 1 and Bus 2. The voltage V_pv = V_s requires that the source of the reactive power comes from both sides. Thus, the larger the contribution of the reactive power, the higher the voltage of the source of the reactive power.

Real Power Control

The equation describing the relationship of the voltage at the two buses to the corresponding voltage drop across the reactance, X_s, can be written as follows

\(P=\frac{V_{pv}V_{s}}{X_{s}}sin \left( \delta \right)\)

Real power output can be increased in many ways. For example, increasing the real power output while maintaining equal voltage (V_pv = V_s) can be illustrated by the changes shown in the phasor diagrams on the right. As mentioned above, in this equal-voltage condition both sides share the reactive power loss in the line reactance, X_s, equally. As the current, I_s, increases, the power angle, δ_e, also increases while equal voltage is maintained (V_pv = V_s).

Power-Converter-Based Power System

Reactive Power Control

Figure on the right illustrates the power converter based power system and its corresponding phasor diagram. The PV generator is connected to a grid through a reactance, X_s. The current, I_s, is decoupled into real and reactive components (I_p1 and I_q1). Assuming that the grid is an infinite bus, V_s is constant. The impact of reactive power’s contribution on voltage regulation can be illustrated by the appropriate phasor diagrams. The phasor current, I_s, is divided into the real current, I_p, (in phase with the voltage V_pv) and reactive current, I_q, (in quadrature with respect to the voltage, V_pv) components.

The voltage equation is rewritten as

\(V_{pv}=V_{s}+jX_{s} \left (I_{p}+I_{q} \right )\)

The real current component, I_p, is proportional to the real power generated, and the reactive current, I_q, is proportional to the reactive power generated. Doubling the reactive current, I_q, will double the voltage drop, I_qX_s, and directly increase the terminal voltage, V_pv, by an additional I_qX_s. Thus, to increase reactive current, we need to increase the voltage, V_pv. The larger the value of X_s, the higher the voltage, V_pv, will increase as the same amount of the I_q current is increased. As can be expected, increasing the reactive component of the current, I_q, will directly impact the terminal voltage magnitude, V_pv, and increasing the real current component, I_p, will more directly impact the power angle, δ, between V_pv and V_s.

In PV generation, two limits must be observed:

• The total resultant current, I_s, is limited by the maximum current-carrying capability of the power converter (I_max). Thus, the power converter can increase its real or reactive current components (or both) only to a certain level, until the resultant current reaches its maximum (I_s = I_max – current-carrying capability of the IGBT switches). At that point, the overcurrent protection will prevent the PV inverter from delivering more current.

• The maximum terminal voltage, V_pv, must be limited to the maximum voltage of the power converter. Thus, the power converter can increase its reactive current component, I_q, only so much, until the terminal voltage reaches its upper limit. At that point, the overvoltage protection will prevent the PV inverter unit from delivering more reactive current to the grid.

Real Power Control

The phasor diagram to demonstrate real and reactive power control in a PV inverter shows the size of the real current component increased to I_p2, while the size of the reactive current component, I_q1, is maintained. The additional voltage drop, jX_sI_p2, is shown to increase by the same proportion. This affects the increase in the angle between V_pv1 and V_s. Because the size of the infinite bus, V_s, is constant, the increase in I_p increases the voltage drop, but it decreases the voltage, V_pv2. The size of the reactive current component stays the same, and the resulting voltage drop, jX_sI_q2, also stays the same size. Note that the voltage, V_pv, decreases from V_pv1 to V_pv2. To return V_pv2 to the same level as V_pv1, the reactive current component, I_q, is increased to I_q2. This indicates the size of the voltage, V_pv1, and the size of the current, I_p2. The increase in the output power is proportional to the change from I_p1 to I_p2, and the reactive current contribution to cover I_s2X_s loss are equally distributed between V_pv and V_s.

Current-Source Inverter (CSI)—Average Model

Presently, most power converters are current-source inverters (CSIs). In the power drives, the current-control converter gives a very fast response to the torque required. In a grid-connected power converter, the current-control capability can give a quick response to the real and reactive power demand.

We consider an average model one of an ideal power converter that can generate a sinusoidal current (with no harmonics). Thus, we simulate a PV inverter as a sinusoidal-current source. The output current is synthesized to give a sinusoidal output current that has a controllable magnitude and phase angle. In a PV inverter, it is common to control the real (I_p) and reactive (I_q) components of the output currents.

The one-line diagram of an average model of a CSI synthesizing a PV inverter shows a three-phase PV inverter (an ideal model of a three-phase current source) connected to the grid. The DC-AC (alternating current) inverter has two major functions: (1) to control the real power output of the PV strings and (2) to control the reactive power output. In actual PV generation, the control of the real power is very simply implemented by maintaining a constant DC bus voltage while the controlling the DC-DC converter to maximize the output power of the PV module.

The CSI is the block inside the rectangle marked by the dashed black lines. The first thing to consider when controlling a CSI is to find the reference frame at the point of measurement to which it is connected. In this case, the reference is the terminal voltage of the PV inverter. The voltage sensor is placed at node V_pv, as shown. Similarly, the real (P_pv) and reactive power (Q_pv) sensors are inside the multi-meter at the V_pv node.

Figure on the right shows a simplified equivalent circuit of the current source producing the output current, I_s. Using the d-q axis synchronized to the phasor voltage, V_pv, we can decouple the current, I_s, into its d-axis component (real current; I_d = I_p component) and the q-axis, the reactive current component, I_q. The real current component, I_p, is used to control the output real power of the PV inverter. The control of the reactive current component, I_q, is used to control the reactive power output of the PV inverter. PV inverter generates reactive power into a regular (non-infinite bus) grid. The terminal voltage increases as the reactive power output of the PV inverter increases. Consequently, controlling the reactive current component, I_q, can be used to control the terminal voltage and vice versa.

The equation for the current can be expressed in a complex number

\(V_{pv}=V_{pv}∠0^o\) \(I_{s}=I_{s}∠-\Phi_{ο}\)

Based on the arrow direction, by definition (generator convention), the apparent power generated by the PV inverter can be written as:

\(S_{pv}=V_{pv}⋅I_{s}^{*}=P+jQ\) \(P=V_{pv}⋅I_{s}⋅cos \left (\Phi_{ο} \right )\) \(Q=V_{pv}⋅I_{s}⋅sin \left ( \Phi_{ο} \right )\)

The current conjugate of the output current is expressed as I_s^*. Thus, both the real power and the reactive power have positive values (generated from the PV inverter).

The phase-locked loop is the synchronizer that will latch the reference frame to the synchronous reference frame attached to the voltage phasor, V_pv, at the terminal of the PV inverter.

Note that after we found the reference frame of the terminal voltage, the real current component (I_p) and the reactive current component (I_q) can be oriented with respect to the “direct axis,” which has the same phase angle of the the terminal voltage, V_pv. Note that the subscript “p” indicates the real power component, and “q” indicates the reactive power component. The real power component, I_p, is represented by the “direct” axis component (in phase with the synchronous reference frame, “d”); thus, it is sometimes used to indicate I_p = I_d; whereas the “q”also represents the “quadrature” axis component (in quadrature with respect to the direct axis, “d”), thus I_q = I_q.

The diagram on the right shows a simple control to regulate the real and reactive power output of a PV inverter. The independent control is possible because the real and reactive currents are decoupled through the use of the synchronous reference frame calculation.

To use the same controller for differently sized power converters, and to avoid performing very complicated parameter tunings, it is common to use per-unit quantities.

After the real (I_pvd-ref) and reactive (I_pvq-ref) current components in the synchronous reference frame have been computed the quantities I_pvd-ref and I_pvq-ref can be transformed into the three-phase currents in the stationary reference frame (the time domain sinusoidal forms I_pvaref, I_pvbref, and I_pvcref). These current signals are used to control the ideal current source to represent the CSI connected to the grid.

Note that by using the average model, we can ignore the switching of the power switches, and we can assume that it has an infinite switching frequency—i.e., the resulting current is represented by the pure sinusoid generated by the controlled-current source to represent the practical CSI. One major advantage to this is that the simulations can be accomplished in a much shorter time, which allows us to perform many different types of dynamic simulations in power system studies.

CSI—Detail Model

The hardware of the power converter is represented by the real IGBT in parallel to its flywheel diode. The circuit driver is simulated by the real switching pattern commonly used in an actual power converter. The circuit is connected to the grid, as in the previous section. The only differences are that the ideal current source is replaced by an actual (hardware) power converter with six power switches and the firing control logic is implemented. The fundamental of power electronics converters, applications, and design can be found here ^[2]

Power-Switching Control

The commanded sinusoidal reference three-phase currents are compared to the actual three-phase currents, and the errors are compared to a triangular waveform with a peak-to-peak value of ±1. The currents are per-unitized by dividing the current errors by the base current. The outputs of the comparators are used as the firing signals to drive the base of the IGBTs; thus, they turn the IGBTs on and off.

The time delays are inserted in series with the firing signals to ensure that the top and bottom pairs of the IGBTs do not turn on at the same time to avoid short-circuiting the DC bus. This time delay is very small, in microseconds (modern IGBTs can turn on and off very fast). The detailed operation of the power converter is well-known technology that can be found in many power electronics textbooks.

Current-Regulated CSI

To regulate the real and reactive power output of the power converter, the same technique is used. The real (I_{d_ref}) and reactive current (I_{q_ref}) components are computed in the synchronous reference frame to obtain the phasor quantities. The rotating reference frame is attached to the phasor voltage, V_pv, and the rotating angle “phis” is found using the phase-locked loop.

The real and reactive current components (I_{pvd_ref}, I_{pvq_ref}) in the synchronous reference frame are then transformed back to the three-phase sinusoidal current references (I_pvaref, I_pvbref, I_pvcref) in the stationary reference frame to drive the power switches of the IGBTs.

The per-phase voltage and the line-to-line voltage monitored at the terminal of the power converter are shown on the right. As can be expected, the output of the pulse-width modulation contains a lot of harmonics at the specified switching frequencies (900 Hz).

The line current in Phase A is closer to the sinusoidal current, although the higher harmonic content is still visible. Note that the actual current is synthesized to follow the sinusoidal reference signal, I_{pva_ref}.

The measured real power and the reactive power at the terminal of the power converter are shown on the right. As the measurements are taken farther from the terminal of the PV inverter, the higher harmonic components of the currents are filtered out and the output voltage and currents look very sinusoidal.

The measurements of the line currents and voltages taken at the high side of the substation transformer are shown on the right. The filtering of the line impedance very effectively cancelled most of the higher harmonics in both the currents and the voltages.

Voltage-Source Inverter (VSI)—Detail Model

A voltage-source inverter (VSI) synthesizes a voltage source connected to the grid. Because real and reactive power control is generally accomplished by controlling the reference currents, and controlling the voltage does not guarantee a direct response of the output currents, it is common practice to control the current indirectly by controlling the voltage output of the PV inverter. As shown below, the hardware for the VSI and the CSI are identical.

The CR-CSI uses the reference current to generate a current signal to trigger the base drivers of the IGBTs and uses the current feedback to compare and correct the current errors to make accurate syntheses of the PV inverter output current. Thus, the filter inductance (represented by the reactance, X_ls) does not have to be included in the equations used to generate the output currents.

The CR-VSI indirectly controls the output current. It uses the voltage feedback V_pv and the corresponding voltage drop across the filter inductance, X_lsI_s, to synthesize the voltage feedback E that will produce the desired output currents (I_s-reference). Thus, the filter inductance, X_ls, must be included in the equations used to generate the voltage E.

Consider the phasor diagram of the controller used to generate the voltage E in a CR-VSI. The single-line diagram of the power converter is enclosed in the dashed black lines. First, consider the voltage, V_s, as an input to the phase-locked loop; thus, the d-axis is aligned to the voltage, V_s.

The equations governing the voltage can be written as

\(E=V_{pv}+jX_{ls}I_{s}\)

We can decouple the equation into its complex representation as:

\(E_{d}+jE_{q}=\left (V_{pvd}+jV_{pvq} \right )+jX_{ls} \left (I_{d}-jI_{q} \right )\)

Or, this can be decoupled into two equations:

\(E_{d}=V_{pv}+X_{ls}I_{q}\) \(E_{q}=V_{pvq}+X_{ls}I_{d}\)

The Clarke and Park transformations can be used to transform the terminal voltages (V_pva, V_pvb, V_pvc) in the stationary reference frame into the synchronous reference frame (V_pvd and V_pvq). When the V_pv is used as the input to the phase-locked loop, the d-axis is aligned to the phasor voltage, V_pv, and the phasor, V_pvq = 0, as represented by the phasor diagrams with the reference frame aligned to V_pv.

\(E_{d}=V_{pvd}+X_{ls}I_{q}\) \(V_{pvq}=0\)

The q-axis equation can be rewritten as:

\(E_{q}=X_{ls}I_{d}\)

Figure on the right shows the implementation of the voltage reference signals E_d and E_q. Additional input to make any corrections is also implemented using the PI controller to ensure that the reference real power and reactive power can be maintained.
After the voltage reference signals of the E_qref and E_dref have been computed in the synchronous reference frame, the three-phase voltage signals (E_aref, E_bref, E_cref) in the stationary reference frame can be generated and fed into the firing circuit board of the power converter to turn the IGBTs on and off in the correct sequence.
Figure on the right presents an example of the per-phase voltage and the line-current output of the CR-VSI. Note that the current waveform is less sinusoidal compared to that of the CR-CSI, because the power converter is not commanded to follow the reference currents; instead, it is commanded to synthesize the reference voltages, E_aref, E_bref, and E_cref.

Controlling the Grid-Side Inverter and Power Plant

The PV inverter is the point of conversion from DC to AC power. In small residential applications, the PV inverter is usually single phase, converting DC to single-phase AC (60 Hz). The PV array is connected to the PV inverter via a maximum power point tracker to optimize energy conversion from sunlight to electrical power. A PV inverter for large-scale installation usually comes in three-phase arrangements. The PV inverter combines the output of rows of PV strings in DC and converts them to AC. For example, an inverter can processes the output of a PV array with 500 PV modules. Three-phase output rated at 208 V or 480 V is commonly found in commercial PV inverters. Again, it must be emphasized that the topology described here is a single-stage topology, and controls for multi-level and multi-stage converters will require significant modifications from the ones described here.

In this section, we implement a controller based on the controllers developed and recommended by the WECC Renewable Energy Modeling Task Force (REMTF)^[3]. A block diagram illustrating an overview of PV power plant control is shown in block diagram representing a PV power plant. From left to right, the highest level of control is implemented first, by the control block REPC; to the REEC, with a focus on the level of the PV inverter; then to the REGC, which is implemented to correct utility interface issues.

• REPC — This supervisory control is implemented to control the real and reactive power of an entire PV power plant. Inputs may include the reference voltage (V_ref), reference reactive power (Q_ref), reference real power (P_ref), and reference frequency (Freq_ref). Thus, the control block functions to control the real power output to respond to a frequency disturbance (and/or governor response) and to respond to a voltage regulation at a bus (at the point of interconnection or at the remote bus).

• REEC — This power-converter control is implemented to limit the currents based on the carrying capability of the power switches (i.e., IGBT and free-wheeling diode). Different types of reactive power control are implemented in this block as well.

• REGC — This generator control is implemented to the grid interface (under-/overvoltage scenarios) and enables nonlinear current control capability.

Device Level

A PV inverter is a mature technology developed early on by the power drive industry for adjustable-speed drives, also known as adjustable-frequency drives, used to control the variable-speed operation of electric machines (e.g., induction motors) with torque or speed-control capabilities. Later, grid-interface technology was also developed extensively by the industry to provide uninterruptible power supply for the computer industry. Thus, the basic operations have been developed based on the experiences gained by the various industries. The details of the design, analysis, and protection at the device level can be found in many power electronics textbooks.

Generator Level

At the generator level, the controller focuses on power-converter control and protection at the power-converter level. Two controllers to serve these functions have been developed by the WECC-REMTF. These controllers are meant to provide good grid integration to allow a PV converter to interface with the utility grid according to local standards and regulations. A PV controller can be set to provide fault ride-through capability, current limit protection, instantaneous and independent control of real and reactive power, and ancillary services to the grid.

REGC

The REGC is the first controller to be implemented and is directly connected to the power converter driver logic. The inputs to this block are the commanded real power (P) current component (I_pcmd) in phase with the voltage (V_t), and the commanded reactive power (Q) current component (I_qcmd), the current component in quadrature (perpendicular) to the voltage V_t. The total current (I_cmd) consists of the two components: I_pcmd and I_qcmd. The REGC is intended to ensure that the power converter has ride-through capability when exposed to local disturbances or transmission line faults.

The outputs to this block are the commanded real power (P) current component (I_pord), the current component in phase with the voltage V_t, and the commanded reactive power (Q) current component (I_qord), the current component in quadrature (perpendicular) to the voltage V_t. Both of these quantities (I_pord and I_pord) are the adjusted input values during high- or low-voltage operation.

The REPG uses per-unit quantities and the generator base (PV inverter base; e.g., MBASE = 1.5 MVA) instead of a system base or PV power plant base (e.g., SBASE = 60 MVA). However, if a single-generator representation is used, the REPG uses MBASE = SBASE.

As shown in the Block diagram illustrating the HVRCM controller to inject additional inductive current during a high-voltage event, the high-voltage reactive-current management (HVRCM) functions to alter the control behavior of the reactive power during high-voltage operation (e.g., higher than 1.2 p.u.), and the low-voltage active-current management (LVACM) functions to alter the control behavior of the active power during low-voltage operation (e.g., lower than 0.9 p.u.).

High-Voltage Region

The block diagram shown on the right can be used to describe the control functions of the HVRCM. The term reactive current is used to describe both the inductive current and capacitive current. Inductive current is the current that causes a power converter to absorb reactive power, and the capacitive current is the current that causes a power converter to produce reactive power.

The HVRCM has the control property to change the output reactive current command (I_qcmd) by providing an additional inductive current injection to decrease the reactive power output of the power converter, thus indirectly reducing the terminal voltage of the power converter. It also has a ramp-rate limiter to limit the rate of change in the reactive current output.

In analogy to the droop, in a power plant governor this HVRCM also functions to increase the inductive current to draw more reactive current from the grid, thus, in effect, reducing the terminal voltage.

Figure on the right describes the changes in reactive power command if the terminal voltage (V_t) exceeds the threshold voltage (V_olim). The slope of the line is specified as the constant (K_hv).

Note that the additional current injection is not activated until the level of the terminal voltage passes the overvoltage limit (V_olim). The sensor used to activate this function is embedded in the comparator with the logic output Hi_V_flag = 1.

Under normal circumstances (the logic output Hi_V_flag = 0)

\(\Delta Q=0\) \(I_{qcmd1}=I_{qcmd0}\)

However, when the Hi_V_flag = 1, the inductive current injection is activated, and the following equations are used to govern the output of the inductive current injector:

\(\Delta V_{t}=V_{olim}−V_{t}\) \(\Delta Q=Q_{cmd0}−Q_{cmd1}\) \(\Delta Q=K_{hv}· \Delta V\) \(I_{qcmd1}=I_{qcmd0}−\frac{\Delta Q}{V_{t}}\)

Take, for example, V_olim= 1.2 p.u., K_hv = 0.7, the initial I_qcmd = 0.1 p.u. at the terminal voltage of V_t = 1.0 p.u. The terminal voltage suddenly increases to V_t = 1.3 p.u. because of an external disturbance. The reactive power, which was initially Q_{cmd_0} = 0.1 p.u. during the high-voltage event, decreases to Q_{cmd_1} = (0.1 – 0.07) p.u. = 0.03 p.u.Note that the current limiter is placed to ensure that the I_qmax (computed in the REEC block) is not exceeded.

The choice of K_hv is certainly determined by the local power system network. If the voltage in the local network varies a wide range above normal, the value of K_hv can be adjusted accordingly. The impact from a single PV inverter to suddenly change the voltage level may not be significant; however, the collective impact of hundreds of PV inverters connected to the grid following the same command will definitely be very effective. Also note that the current limits must be set to the limit of the reactive power capability of the power converter. These currents are limited before the commanded currents are passed to the power switches via the variable I_qord.

Low-Voltage Region

The block diagram illustrating the LVACM controller to adjust the real current component during a low-voltage event can be used to describe the control functions of the LVACM. The term active current is used to describe the real or active power component (e.g., I_pcmd or I_pord).

In summary, the LVACM allows two choices determined by the low-voltage power logic, or LVPL (the upper limit of I_pcmd), switch. If LVPL = 1, the upper limit of the real power current component I_pcmd is governed by the nonlinear map LVPL compared to V_t. If LVPL = 0, the upper limit of the real power current component I_pcmd is governed by I_pmax computed in another controller block called REEC.

The Block diagram illustrating the LVACM controller to adjust the real current component during a low-voltage event shows two quantities that should be computed. The first one is the scaled voltage (V_{t_scaled}), and the second one is the upper limit of the real current component (LVPL).

Computing V_{t_scaled}

Consider the V_{t_scaled} computation. V_{t_scaled} is computed from preprogrammed map shown in scaled voltage to adjust the P_ord during a low-voltage event. During a low-voltage event, the commanded power (P_ord) must be scaled down to accommodate the current-carrying capability of the power switches (IGBT and diodes). The P_ordshould be scaled such that the resulting I_pord current will be within the allowable limit.

For example, if the original commanded power P_ord = 1.0 p.u., under normal voltage (V_t = 1.0 p.u.), the commanded real power stays the same. Suppose during a grid disturbance the voltage drops to V_t = 0.6 p.u.; without scaling, the computed current command would be very high (I_pcmd = P_ord/V_t = 1.0/0.6 = 1.67 p.u.), which is much larger that the allowable current limit (I_pmax ~ 1.2 p.u.). Thus, by scaling the voltage accordingly, the new P_ord= V_{t_scaled} x 1.0 p.u. = 0.4 x 1.0, which gives the new P_ord = 0.4 p.u.

Note that when voltage is within the normal range (0.9 p.u.< V_t < 1.1 p.u.), the power converter must be capable of delivering P_ord = 1.0 p.u.; thus, the voltage is scaled to 1.0 for voltages V_t > 0.9 p.u. For example, at V_t = 0.9 p.u., the P_ord = 1.0 p.u. and I_pcmd = 1.11 p.u., which is within the maximum current limit.

Computing LVPL

The second quantity of interest is the LVPL. This quantity is actually the upper limit of the real power component. There are two options based on the position of the logical switch, LVPL_sw. If LVPL_sw = 0, the value of LVPL is set to I_pmax (computed in the REEC block and indicated by the thick, bold, black line shown in LVPL calculation to set the upper limit of I_pcmd during a low-voltage event); on the other hand, if LVPL_sw = 1, the value of LVPL is computed by using the nonlinear map shown above.

Unlike using the map for the scaled voltage presented previously, using the LVPL map may or may not affect the outcome of the commanded output power P_ord; instead, this map is applicable only to the commanded current output, I_pcmd. For example, under normal voltage (V_t = 1.0 p.u), I_pcmd = 0.2 p.u. If the voltage suddenly drops to 0.6 p.u., indicated by Point A on the map, the computed LVPL = 0.48 p.u.; thus, it does not affect the I_pcmd (i.e., at V_t = 0.6 p.u.) the I_pcmd is not limited, and it is the same as the original value (I_pcmd = 0.2 p.u., indicated by Point A’). On the other hand, if the original I_pcmd = 0.8 p.u. (at V_t = 1.0 p.u., as indicated by Point B) and the voltage suddenly drops to V_t = 0.6 p.u., the commanded I_pcmd must be limited to I_{p_LVPL} = 0.48 p.u., as indicated by Point B’ in the map. Note that within the normal voltage range, the current is limited to I_pmax. (I_pmax is set to 1.2 p.u. in this particular map for 0.9 p.u. < V_t < 1.1 p.u.)

If LVPL_sw = 0, the value of LVPL is set to I_pmax. If the original I_pcmd = 0.8 p.u. (at V_t = 1.0 p.u., as indicated by Point B) and the voltage suddenly drops to V_t = 0.6 p.u.; the commanded I_pcmd will stay the same as the upper limit of the I_{p_LVPL} = 1.2 p.u. Thus, the operating point will move from Point B at V_t = 1.0 p.u. to the new operating point at V_t = 0.6 p.u., then to a new operating point as indicated by Point B” in the map.

Revised Commanded Power P_ord in the Low-Voltage Region

The revised commanded power P_ord, computed based on the output of the V_t scaler and LVPL, can be different for different power levels and different settings of the LVPL_sw logic switch.

• Example 1

Normal condition P_{ord_orig} = 0.8 p.u.; V_t = 1.0 p.u.; and I_pcmd = 0.8 p.u.
LVPL_sw = 1. The voltage drops to V_t = 0.6 p.u., P_{ord_new} = V_{t_scaled} x I_{pcmd_limited} = 0.4 x 0.48 = 0.192 p.u., and the new I_pcmd = I_pord = 0.192/0.6 = 0.32 p.u.
LVPL_sw = 0. The voltage drops to V_t = 0.6 p.u., P_{ord_new} = V_{t_scaled} x I_{pcmd_limited} = 0.4 x 0.8 = 0.32 p.u., and the new I_pcmd = I_pord = 0.32/0.6 = 0.533 p.u.

• Example 2

Normal condition P_{ord_orig} = 0.2 p.u.; V_t = 1.0 p.u.; and I_pcmd = 0.2 p.u.
LVPL_sw = 1. The voltage drops to V_t = 0.6 p.u., P_{ord_new} = V_{t_scaled} x I_{pcmd_limited} = 0.4 x 0.2 = 0.08 p.u., and the new I_pcmd = I_pord = 0.08/0.6 = 0.133 p.u.
LVPL_sw = 0. The voltage drops to V_t = 0.6 p.u., P_{ord_new} = V_{t_scaled} x I_{pcmd_limited} = 0.4 x 0.2 = 0.08 p.u., and the new I_pcmd = I_pord = 0.08/0.6 = 0.133 p.u.

Thus, the impact of the controller on the outcome of the commanded active power component is significant for medium to rated power when the LVPL_sw is activated. However, when the active power command is low, it makes no difference whether the LVPL_sw is activated or not.

REEC

The REEC is designed to control the real and reactive power (under normal and transient conditions). The REECuses per-unit quantities and the generator base (PV inverter base; e.g., MBASE = 1.5 MVA) instead of a system base or PV power plant base (e.g., SBASE = 60 MVA). However, if a single-generator representation is used, the REPG uses MBASE = SBASE.

Control Implementation of Reactive Power and Voltage Control

The block diagram illustrating the computation of the reactive power input command Q_in illustrates the control mechanism of the reactive power control. Two stages are considered. This controller controls the reactive power to match the reactive power command, Q_in. The Q_in is the input to the PI controller to regulate the reactive power or voltage, as shown in reactive power and voltage control diagram (enclosed in the solid black line). For now, ignore the blocks NoFreeze and Freeze and assume that these blocks are shorted.

Logical Switch PF_flag

If the controller is set to control the reactive power output of the power converter (Vflag = 1; see the description of Vflag below), two options are available to control the reactive power output.

• PF_flag = 1 sets the reactive power input command to follow Q_pf computed based on a constant power factor pfaref. The reactive power is commanded to be proportional to the actual real power Pe output; thus, it varies with the actual output power Pe as the output changes, except when the pfref = 1; however, in this case, the reactive power is commanded to be zero at all times. The Q_pf calculation can be shown as:

\(Q_{pf}=Pe·tan \left (cos^{-1} \left ( pfaref \right ) \right )\)

• PF_flag = 0 sets the reactive power input command to follow the external reactive power command Q_ext. This input can be driven by supervisory control within the supervisory control domain (i.e., the REPC block diagram).

Logical Switch Vflag

The logical switch Vflag functions to control the reactive power output of the power converter. This block is inside the rectangle marked by the dashed red line. The input to this block is the output of the first block, and it may take two branches or directions, depending on the Vflag set. Focus on the circuit enclosed in the rectangle marked by the thin red line.

• Vflag = 1. The logical switch is set to A, then the reactive power control is chosen. The reactive power output will be controlled to match the reference Qin.

• Vflag = 0. The logical switch is set to B, then the voltage control is chosen. Note that the limiter placed before the V_star will limit the value of V_star (thus, the V_ref1) within the acceptable voltage level (Vmin < Vstar < Vmax). The terminal voltage V_t will be controlled to match the reference voltage V_ref1.

Logical Switch Qflag

The output from the block enclosed in the red rectangle shown in the reactive power and voltage control diagram will be the input A to the next logical switch (shown in the light blue ellipse) and to the next stage to calculate the commanded reactive current I_qcmd. The logical switch is activated by the Qflag. The logical switch Qflag functions to determine if the reactive power output will be controlled via the two PI controllers (within the rectangles marked by the solid black line and the solid red line) or via the linear path (within the rectangle marked by the black dashes and dots).

• Qflag = 1 and Vflag = 1. The reactive power is accomplished via the PI controller inside the rectangle marked by the solid black line and the PI controller inside the rectangle marked by the dashed red line (two PI controllers in series).

• Qflag = 1 and Vflag = 0. The voltage is controlled by the PI controller shown inside the rectangle marked by the dashed red line (a single PI controller).

• Qflag = 0. The reactive power is controlled by a feed-forward linear loop without the PI controller (see the rectangle marked by the black dashes and dots). This loop will allow the reactive power to be controlled externally—for example, by supervisory control via the variable Q_ext to accomplish plant-level reactive control by paralleling the response of all the PV inverters within the PV plant (see the REPC block diagram).

Identifying Abnormal Voltage Range

Another logical switch is the one encircled within the dashed green ellipse shown in the reactive power and voltage control diagram. This logical switch enables the injection of additional reactive current, I_qinj, during abnormal voltage (either in the overvoltage condition when the voltage V_t > V_up or in the undervoltage condition when the voltage V_t < V_dip.

Figure on the right shows the logical switch Volt_dip. This logical switch will be operated based on the detection of the terminal voltage, V_t, as shown in the diagram.

• Volt_dip = 0 is a normal condition, and the injection current I_qinj = 0.

• Volt_dip = 1 is an abnormal condition, and the injection current is used based on the droop characteristic.

The output commanded reactive current, I_qcmd, is limited by its maximum, I_qmax, and its minimum, I_qmin. Calculating I_qmax and I_qmin will be shown in a later section.

Additional Reactive Current Injection, I_qinj

The additional reactive current injection is computed based on the size of the voltage deviation of the terminal voltage, V_t, from the reference voltage, V_ref0.

Calculating an additional reactive current injection is done with the linear model shown in the diagram illustrating an additional reactive current injection during an abnormal voltage event (Volt_dip = 1). This controller block includes the deadband db₁ and db₂ to disable the control from injecting the additional reactive current, I_qinj, when the voltage is within the normal range. In most cases, the reference voltage is assumed to be V_ref0 = 1.0 p.u., and the normal voltage range 0.9 p.u. < V_t < 1.1 p.u.; thus, the deadbands db₁ = db₂ = 0.1 p.u. The constant value K_qv is the slope affecting the aggressiveness of the current injection, I_qinj, to correct the voltage deviation. Note that the impact of the controller is dependent upon the stiffness of the grid, the availability of current-carrying capability of the power converter to pass this additional current, and the control setting of the PQflag. However, db₁, db₂, K_qv, and V_ref0 can be adapted to the new values to follow specific regional and/or local rules and regulations.

Block diagram illustrating a method to compute an additional reactive current injection during an abnormal voltage event (Volt_dip = 1) shows the control block diagram implementation of the additional current injection based on the voltage condition.

Real Power Control

Because the relationship of the reactive power to the terminal voltage is very tight, either the reactive power control or the voltage control is generally chosen. The reference real current component, I_pcmd, can be computed by dividing the reference power, P_ref, by the terminal voltage.
The block diagram illustrating a method to compute the real current component, I_pcmd illustrates the following calculation:

\(I_{pcmd}=\frac{P_{ref}}{V_{t}}\)

The current limiter is used to limit the I_pcmd to the allowable I_pmax based on the setting of the PQflag (P-priority or Q-priority).

Calculating the Maximum and Minimum Current of I_pcmd and I_qcmd

To prevent the power switches (IGBTs and diodes) from conducting current higher than the current-carrying capability, the control block diagram illustrating a method to compute the current limits for the real and reactive current components can be used to implement overcurrent protection.
Two type of priorities can be set through the PQflag.

• PQflag = 1 is also known as P-priority. The controller’s priority is to maximize the range of the real current component, I_pmax, and use the remaining current capability for the reactive current component, I_qcmd.

\(I_{pmax}=I_{max}\) \(I_{pmin}=0\) \(I_{qmax}=\sqrt{I_{max}^2-I_{pcmd}^2}\) \(I_{qmin}=-I_{qmax}\)

• PQflag = 0 is also known as Q-priority. The controller’s priority is to maximize the range of the reactive current component, I_qmax, and use the remaining current capability for the real current component, ”’I_pcmd.

\(I_{pmax}=\sqrt{I_{max}^2-I_{qcmd}^2}\) \(I_{pmin}=0\) \(I_{qmax}=I_{max}\) \(I_{qmin}=-I_{max}\)

Figure on the right illustrates the operation in P-priority and Q-priority. During a normal condition, the terminal voltage is assumed to be V_t = 1.0 p.u., and the maximum current allowed is I_max = 1.3 p.u. We assume initially that the output real power P = 0.8 p.u. I_pcmd = 0.8 p.u., and the reactive power Q = 0.2 p.u., I_qcmd = 0.2 p.u.; thus, the initial current is shown as the phasor I₁.
The operation of P-Priority and Q-Priority is triggered by the logic diagram shown inside the red ellipse. Unless stated differently for different projects, during normal operation the P-Priority is set to maximize the energy yield of the renewable energy resources; thus, P-Priority is enabled (PQflag = 1) during normal operation (when the logic Volt_dip = 0). Even during abnormal voltage (V_dip = 1), the P-Priority can be activated (PQflag = 1) under certain circumstances.

Operation in P-priority

The left part of the phasor diagram illustrating the P-priority and Q-priority illustrates the operation when P-priority option is selected. When a disturbance in the transmission line occurs, the voltage drops to V_t = 0.5 p.u. Using the P-priority, we can compute the maximum

\(I_{pmax}= \sqrt{1.3^2 – 0.2^2} = 1.28\)

p.u. Because the operation is set to P-priority, the controller tries to maintain output power constant at P = 0.8 p.u.; however, this requires

\(I_{pcmd} = \frac{0.8}{0.5} = 1.6\)

p.u., which is higher than the allowable I_pmax = 1.28 p.u. Thus, we have to settle to I_pcmd = 1.28 p.u., and I_qcmd = 0.2 p.u. is frozen and must stay the same as the value before the voltage drop, and the output current changes from I₁ to I₂.

Operation in Q-priority

The right part of the phasor diagram illustrating the P-priority and Q-priority illustrates the operation when the Q-priority option is selected. When a disturbance in the transmission line occurs, the voltage drops to V_t = 0.5 p.u. Using the Q-priority, we can compute the maximum

\(I_{qmax} = \sqrt{1.3^2– 0.8^2} = 1.02\)

p.u. Because the operation is set to Q-priority, the controller tries to maintain the output reactive power constant at Q = 0.2 p.u. Thus, the required

\(I_{qcmd} = \frac{0.2}{0.5} = 0.4\)

p.u. This value is the maximum range of allowable I_qmax = 1.02 p.u. The phasor current I₁ moves to I₃. Note that the magnitude of the phasor I₃ = 0.89 p.u., which is less than the maximum current limit I_max = 1.3 p.u.
Next, consider the additional current injection, I_qinj, to support the voltage during the voltage dips. In this case, assume that K_qv = 2.0 and V_ref0 = 1.0 p.u. When the voltage, V_t, drops to V_t = 0.5 p.u. The additional injection current is

\(I_{qinj} = K_{qv}·\left ( V_{ref0} – V_{t} \right ) = 2·\left (1 – 0.5 \right ) = 1.0\)

p.u.; thus, including the current injection, I_qinj, the total

\(I_{qcmd} = 0.4 + 1.0 = 1.4\)

p.u. However, the I_qmax = 1.02 p.u. In this case, we have to settle with I_qcmd = 1.02 p.u. and I_pcmd = 0.8, and the total current

\(I_{4}= \sqrt{1.02^2 – 0.8^2} = 1.3\)

p.u.

Controlling the Freeze During Abnormal Voltage Conditions

It is common in a PV inverter to freeze the states that control the output of the reactive power. This is done during the transients, so that the impact of the short disturbance does not exaggerate the situation and make the power system unstable when the disturbance is removed the grid. In some applications, the output current is frozen until the disturbance is over; however, this will only limit the output current contribution to the fault. The implementation is shown in block diagram illustrating a method to freeze the operating current during voltage dips.

Plant Level

A PV plant consists of many large inverters connected in parallel by miles of AC cables (also known as a collector system). Supervisory control is implemented to the inverters within the power plant to achieve plant-level objectives. As the level of PV penetration increases, PV plants are required to provide low-voltage and high-voltage ride-through capabilities and different types of ancillary services (reactive power support, oscillation damping, inertial response, governor control, spinning reserve, etc.) to the power system network. In large power system studies (such as WECC-wide studies), it is common to represent a wind power plant or PV plant as a single generator, as shown in single-line diagram illustrating a PV plant with a single generator.
As shown, the output of a PV inverter is usually 208 V or 480 V. In the example presented above, the output voltage of the 165-kVA, three-phase PV inverter is 480 V; this is a parallel combination of many inverters representing a PV plant.
The transformers (480 V/34.5 kV) are connected to a substation transformer. Several of these nodes are connected in a daisy-chain fashion, which is then connected to the substation transformer (66 MVA, three-phase, 34.5 kV/110 kV). It is customary for the utility meters to be connected at the high side of the substation transformer to measure the revenue of a PV plant.

REPC

The REPC module shown in control block diagram illustrating voltage regulation for a remote bus is a very useful way to implement the ancillary service capabilities of a renewable energy generator as required by the system operator. The REPC control block can be used to implement supervisory control to both the real and reactive power. Note the capability of the power converter to deliver the desired output and that the current-carrying capability of the power switches (IGBTs) takes precedence over the objective function specified in the REPC. For example, if the current/voltage limit of the IGBT has been reached, and the REPC objective function has not been accomplished, the final outcome will be determined by the IGBTs current/voltage limit.
Like REPG and REEC, the REPC uses per-unit quantities; however, in the REPC, the base quantity used is the system base (a PV power plant base) instead of the generator base (a PV inverter base).

Voltage Control at a Remote Bus

As shown in single-line diagram illustrating a method to accomplish different remote voltage regulations, the remote bus is defined as the bus farther from the terminal voltage. The electrical distance from the terminal voltage is represented by the reactance X_br, the current flowing through the branch is represented by I_branch, and the reactive power flowing in the branch is represented by Q_branch.
The regulated voltage is located in a remote bus from a monitored bus voltage V_reg. Two types of voltage compensation can be activated in the REPC block diagram:

• VcompFlag = 1 — The voltage to be controlled is measured from the Vreg, bus and it is compensated by using the computed voltage drop I X.

Example 1 — If you want to regulate V₁ (high side of the transformer) and have access only to the voltage V_t, then to control V₁, the branch current I_branch = I_xfrmr and X_br = X_xfrmr; voltage V_reg = V_t; and the voltage drop is computed from I_xfmr X_xfmr.
Example 2 — If you want to regulate V₂ and monitor only the voltage V₁, then to control V₂, the branch current I_branch = I_branch1 and X_br = X_s; the voltage V_reg = V₁; and voltage drop is computed from I_branch1 X_s.

• VcompFlag = 0 — The voltage to be controlled is measured from the Vreg bus, and it is compensated by estimating the voltage drop by Kc Qbranch.

Example 1 — If you want to regulate V₃ and have access only to the voltage V₂, then to control V₃, the Q_branch = Q_branch1 and voltage V_reg = V₂, and the voltage drop is estimated by K_c1 Q_branch1.
Example 2 — If you want to regulate V₁ and you have access only to the voltage V_t, then to control V₁, the Q_branch = Q_out and voltage V_reg = V_t, and the voltage drop is estimated by K_cxfmr Q_out.

Reactive Power Control

The reactive power control is illustrated by the control block diagram illustrating a method to regulate reactive power. In this control block diagram, there is a logical switch called RefFlag that must be set to make the following choices:

• RefFlag = 1 — Configure the controller to regulate the voltage based on the measured voltage ‘V_reg.
• RefFlag = 0 — Configure the controller to regulate the reactive power flow in a specified branch (for example, the Q_branch1 in Branch 1 or Q_out measured at the output of bus V_t) to follow the reference, Q_ref. Caution must be taken when controlling a branch from a PV power plant when the output is split into multiple branches. For example, we can control the reactive power flow in a particular branch to follow a certain reference Q_branch = Q_branch1; however, the setup will let us control the reactive power flow only in a single branch, so if we control only the reactive power flow in Branch 1, we do not have any control over the power flow in Branch 2. Because the output of the power plant flows in both Branch 1 and Branch 2, the power plant may have reached its upper limit before Q_branch1 = Q_ref is reached.

The output of this controller is the Q_ext, which is an input to the next block, REEC, and will be used to compute the reactive current component, I_qcmd, that will generate the requested Q_ext. Note that Q_ext is either the reference reactive power Q_ref (for RefFlag = 0) or the equivalent reactive power needed to regulate the voltage at a specified remote bus (for RefFlag = 1).

Real Power Control

The real power control is illustrated by the control block diagram shown in figure on the right. The reference power is set by the reference power Plant_Pref. The diagram shown in single line diagram describing real power control in remote location is an example of how to use reference power Plant_Pref. For example, if the output power of a PV power plant is to be controlled to follow the reference Plant_Pref, then we can set P_branch = P_out.
Caution must be taken when controlling a branch power flow from PV power plant when the output is split into multiple branches. For example, we can control the power flow in a particular branch to follow Plant_Pref by setting Pbranch = Pbranch23 or P_branch = P_branch1. However, the setup will let us control the power flow only in a single branch; thus, if we control only the power flow in Branch 1, we do not have any control over the power flow in Branch 2. The power plant may have reached its upper limit before P_branch1 = Plant_Pref is reached.
This control block diagram shows a logical switch called FreqFlag that must be set to make the following choices:

• FregFlag = 1 — Configure the controller to regulate the real power flowing in the specified branch P_branch using the PI controller to include the reference Plant_Pref and the frequency response
  \(\frac{dP}{dF}\). At this point, the only way to disable the frequency response\(\frac{dP}{dF}\)into the power command mix is to set the slope D_dn = D_up = 0.
• FreqFlag = 0 — Configure the controller to regulate the reactive power flow in a specified branch P_branch to follow the reference real power command Plant_Pref using the feed-forward linear path (bypassing the PI controller) without the influence of frequency response.

The output of this controller is the P_ref, which will be used as an input to the next block, REEC, and to compute the real current component I_pcmd that will generate the requested Plant_Pref.
The real power control following the path with the PI loop lies within rectangle marked by the blue dashes. The diagram within the red rectangle is the frequency response control, and the diagram within the black rectangle is the total control of real power to match the real power flow within the branch to match the reference Plant_Pref.

Additional Real Power Boost to Respond to Frequency Changes

The additional real power control to support frequency regulation is illustrated by the control block diagram shown within the red rectangle in control block diagram illustrating a method to regulate real power. The reference frequency is set by Freq_ref. The measured frequency is the F_req. The error ΔFreq is passed through the deadband block, and the slope is controllable via the parameters D_dn and D_up, and the output is limited by the limiter D_dnMin and D_upMax. Graphical illustration of real power regulation during a frequency excursion shows a graphical illustration of this concept. Note that the characteristics can be made nonsymmetrical to perform governor control and frequency response.

PV Dynamic Model Validation

Dynamic model validation is not an easy task to perform and includes many stages. Ideally, as much information as possible is needed. In a dynamic simulation, enough information may not be available to simulate an actual PV plant that we want to validate. In such a case, assumptions about the missing data have to be made; however, in some cases, the validation simply cannot be performed. On the other hand, having too much but inaccurate information may lead to a bad validation and an inaccurate representation of a PV inverter or PV plant.

A typical model validation will represent a PV plant as shown in single-line diagram illustrating the dynamic model validation, in which a single PV inverter represents the total generation of an entire plant. The first step-up transformer connecting the PV inverter to the collector system is used to step up the voltage from low voltage to medium voltage (e.g., 480 V/34.5 kV). The collector system represents the lines or cables interconnecting the step-up transformer within the power plant to the substation transformer, where all the output of the PV inverters within the PV plant are stepped up to the transmission-level voltage (e.g., 34.5 kV/230 kV) to be transmitted over long distances. This collector system can be aggregated into a single impedance represented by Z_collector.

The recorded voltage measured at the point of interconnection is used to drive the simulation as the infinite voltage source at the point of interconnection. The simulation output of the real and reactive power as well as the output currents were compared to the measured data.

Three-Phase PV Plant Validation

Detailed Model Implementation

A detailed model of the circuit implementation is shown in figure on the right. To prepare for dynamic validation, the data measured at the point of interconnection is used as the input to the detailed model; these are usually three-phase voltages and currents. The real and reactive power output can be computed, or it can be obtained from the data recorder. Note that the real and reactive power from the calculation may contain high-frequency noise, whereas the output data obtained from the measurement is usually filtered. For the purpose of the validation, we use a moving average filter for the real and reactive power output computed from the measured three-phase voltages and currents.

The initial condition (pre-fault) of the simulation is adjusted to match the pre-fault measured data. The measured values of the real and reactive power as shown in figure on the right are used to adjust the commanded real and reactive power. The measured data is shown in blue, and the simulated results are shown in green. As shown, the simulation very closely follows the actual output measurement.

In a real set-up, ideally the solar irradiance should be the input; however, this information is seldom available, and—in addition to the transient model analysis, in which the duration of the observation is only a few seconds—this input is less important; thus, we assume that the solar irradiance is constant during the disturbance. The real and reactive power in the pre-fault condition is used to set the real and reactive power commands (reference real and reactive power). These reference values are considered to be constant for the duration of the fault. During the fault the result of the simulation indicates that the real and reactive power changes. That is a result of the control actions of the PV inverter, and it is not because of the reference values of the real and reactive power that are changing during the disturbance. A comparison of the reference values to the measured values shows that the controller of the dynamic models functions properly.

The voltage applied to drive the simulation is shown in the top row of the voltage and current waveforms using a detailed model representation. The PV plant responded to this voltage, thus generating the current waveforms shown in the bottom row of the voltage and current waveforms using a detailed model representation. A comparison of the measured current waveforms to the simulated waveforms indicates that the dynamic model and the controller represent the actual PV plant. Note that the output current, real power, and reactive power are determined by the voltage and the control parameter set for this particular PV plant or PV inverter. By comparing the output real and reactive power shown in figure on the right to the output currents shown in the voltage and current waveforms using a detailed model representation (simulated versus measurement), we can conclude that the PV plant dynamic model very closely represents the actual plant.

Average Model Implementation

The average model of the circuit implementation is shown in figure on the right. The process to prepare for dynamic validation of the average model is the same as that described in the detailed model representation.

The upper part of the comparison of the simulation output to the measured output for an average model shows the real power compared to the reactive power, and the lower part shows the voltage and current waveforms measured at the point of interconnection. This is the voltage used to drive the simulation. A comparison of simulation results shows that there is almost no difference between the detailed model and the average model. Also, a comparison of currents shows that the current waveforms from the detailed model are very similar to the current waveforms from the average model. The only difference is the apparent harmonics shown in the output of the detailed model, but the fundamental components are very closely matched.

Single-Phase PV Plant Validation

In this section, a single-phase PV plant is validated against the measured data. This small-scale PV plant is illustrated in the circuit diagram presented in figure on the right.

The voltage used to drive the simulation and the corresponding real and reactive power output shows the voltage waveforms measured at the point of interconnection. This is the voltage used to drive the simulation. The voltage dip is caused by a fault occurring in the transmission far away from the PV plant.

The real and reactive power output shown on the right in the voltage used to drive the simulation and the corresponding real and reactive power output are the output of the simulation and the measured output. As mentioned previously, the measured data of the real power and the reactive power are filtered and the simulated output of the real and reactive power shows 120-Hz ripples, which is a typical characteristic of single-phase output power.

The output currents are shown in figure on the right.

References